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USB连接MCU的:哪个更适合你的下一个设计?

关键词:微控制器MCU,USB外设,驱动程序

时间:2015-09-09 13:39:39      来源:网络

国际即时新闻(原文:英文)

USB Connectivity for MCUs: Which is Right for Your Next Design?

Just about every modern MCU family has a USB peripheral. Since USB is a standard, you might expect that all USB implementations are the same. If so, you would be surprised by the wide variety of implementations that meet the standard, but also offer additional capabilities and features that might just make a particular MCU perfect for your next design. This article will describe some of the differentiated USB features you will find in popular MCU families. Once you understand some of the key differences you can better look for the implementation that will offer the perfect fit for your next design.

USB basics

The Universal Serial Bus, or USB, has grown in popularity due to its simple physical layer interface, its flexibility, and ease of integrating – both at the hardware and software levels. Standardized and integrated connectors make it easy to interface an MCU to the USB cable and common drivers and application program interfaces, or APIs, make it easy to access the data and control elements needed to transfer and receive information packets over the USB connection. Readily available reference designs, evaluation boards, and code examples further simplify MCU-based implementations.  The recent introduction of the USB 3.1 standard, with a data signaling rate of up to 10 Gbit/s illustrates that the standard continues to evolve and is likely to be around for many, many more years.

 USB uses an asymmetrical topology, consisting of a host at the top of the connection “pyramid” that manages the entire network. Downstream USB ports (commonly called devices or functions) all connect into the host either directly or via intermediate hubs that can extend the network in a star topology. A host may have multiple host controllers with each controller managing up to 127 ports. USB communication uses pipes, or logical channels, that connect between a host controller and a device endpoint. A USB device can have up to 32 endpoints (16 in and 16 out). There are two types of pipes: a stream, used for data transfers, and a message, used for short commands and status transfers. Data transfers can be either isochronous (with a guaranteed data rate), interrupt transfers (when quick, low-latency transfers are needed), or bulk transfers (typically used for file transfers where latency and data rates are not critical).

One of the more useful aspects of the USB standard is that there are multiple data rates possible (Low speed at 1.5 Mbit/s, Full speed at 12 Mbit/s, High speed at 480 Mbit/s, SuperSpeed at 5 Gbit/s, and SuperSpeed+ at 10 Gbit/s) and the host can determine data rates for each device using a special enumeration process. This simplifies connection management and makes it easy for the application to focus on just transferring data, not managing the establishment of the low-level physical connections.

Several Product Training Modules are available from Digi-Key that discuss the USB standard in significant detail (from FDTI and Wurth Electronics, among others) if the reader wishes to dig deeper. However, for the purposes of this article, the above description should be sufficient to allow us to look at some of the different features and capabilities of MCU-based USB peripherals to better match the requirements of a particular application with an optimal USB-implementation feature set.

USB implementations

With some of the basics of USB understood we can begin to look at the different types of implementations MCU vendors have provided in their devices. Since MCUs are often found controlling USB peripheral devices such as sensors, pointing devices, and audio devices (just to name a few) as opposed to the host controllers more often found in PCs and handhelds, we will start by looking at an example function implementation found in the Spansion FM3 MCU family,  in particular the Spansion MB9AF3 MCU.

The Spansion MB9AF3 MCU uses an ARM-Cortex-M3 CPU and has several advanced peripherals, including motor-control timers, high-speed ADCs, UART, SPI, I2C, DMA, and an external bus interface. A USB peripheral has both a Host and Function interface and the block diagram of the function is shown in Figure 1, below. The CPU interface, on the right side of the diagram, can access the endpoint buffers where data transfers are located. Movement into and out of the buffers are managed by the USB Data Controller (UDC) via the UDC interface. Interrupts can be used to notify the CPU of the status of data transfers and the CPU interface provides access to the buffers from either the CPU or the DMA controller.

Block diagram of Spansion MB9AF3 MCU USB function

Figure 1: Spansion MB9AF3 MCU USB function block diagram. (Courtesy of Spansion)

Key elements of the Spansion USB implementation are the source for the USB clock, the number of Endpoint Buffers, and DMA access to the endpoint buffers.  These features can vary between different MCU vendors since they are not specified by the USB standard. For example, the USB clock is sourced by an on-chip PLL that can use the main clock source of the MCU. This eliminates the need for an external clock reducing component count. Not all USB peripherals include this capability.

From Figure 1 you will also see that there are six endpoint buffers. The number of buffers available varies widely from implementation to implementation. For simple applications, a small number of buffers could be sufficient, but there may be requirements for multiple buffers, perhaps because there are multiple elements (for example, several different sensors managed by the MCU) or because multiple buffers would simplify the software implementation by separating different applications of a single peripheral.

Finally, a common area of differentiation between USB implementations involves the use of DMA. Often it is much more efficient to have endpoint buffers managed independently from the CPU so that the CPU can be doing other, more complex tasks, or can be put in a low-power state until enough data is available to begin processing. The MB9AF3 MCU provides access to the endpoint buffers to the DMA controller and also provides several interrupts that can be used to more easily manage buffer transfers. Look for these capabilities when power efficiency is critical to your application.

Endpoint control

The number of endpoints you require can be a key differentiator when selecting your USB peripheral. The amount of flexibility you have with each endpoint can be an important factor in your selection, too. For example, the Cypress PSoC CY8C24794 has a USB peripheral with five endpoints and each can be separately assigned to respond to Interrupt, Bulk, or Isochronous IN or OUT requests. Figure 2 shows the variety of tasks that can be assigned to each endpoint. This level of selectivity avoids a significant amount of processor overhead that would otherwise be needed to determine the type of task and then transfer control to the needed routine.

Table for Cypress PSoC CY8C24794 (click for full-size)

Figure 2: USB Operating Mode Table for the Cypress PSoC CY8C24794. (Courtesy of Cypress)

The Cypress USB implementation uses a shared memory to store the endpoint data and this could cause an access bottleneck, but the use of a PSoC Memory Arbiter (PMA) prioritizes access between the processor and the USB peripheral. This guarantees that a continuous stream of move instructions by the processor will be serviced even while USB traffic is processed at the maximum rate.

The USB PMA is flexible enough so that endpoint data does not need to be processed before the next USB packet is received. This is done by simply changing the channel’s write location or read location register value. For example, when an interrupt is received indicating that a packet has been received, rather than processing the data and then enabling the endpoint to receive more data, you can simply change the write address for the PMA channel used by the endpoint to a free area of the USB RAM. By doing this, you allow the USB SIE to receive more data while the M8C is processing the previously received data. A similar method may be used to prepare data to be sent by way of an IN transaction.

When comparing endpoint implementations make sure you look not only at the number of endpoints supported, but also at the amount of flexibility and software support the USB peripheral offers. This can improve performance, reduce power consumption, and simplify coding.

USB on the go

USB has also evolved to make it easy to create intelligent USB devices that can connect in either a host or function mode dynamically. This “On the Go” capability makes it possible to use the device as a peripheral (perhaps as a storage device) and then as a host (perhaps to control and power a sensor that records heart-rate activity). This capability is particularly useful in a variety of IoT applications. The Microchip DSPIC33EP256 MCU, for example, supports USB Host, Device and On the Go modes. In many cases low-power operation is important for On the Go applications so it can be important to see what low-power facilities are available for the USB peripheral.

The Microchip DSPIC33EP256 MCU allows the USB peripheral to operate even in some low-power modes. For example, the peripheral can still operate when the CPU is placed in the Idle mode. In the Idle mode the CPU clock is gated off, and this reduces dynamic power considerably. The USB module can continue to operate when the CPU is idle and once a message that needs CPU intervention is received, the CPU can be brought out of Idle. The USB peripheral and the CPU can both be put in an even lower power state, Sleep, where even more power is saved. The USB activity interrupt can be used to wake the device from the Sleep mode whenever there is bus activity on the USB bus.

Another capability you might require from your USB peripheral is advanced testing features. In particular, if you are using USB for the first time some of you might want to include board-level testing functions specifically for the USB port. The Microchip DSPIC33EP256 MCU has a special USB testing mode that can generate a continuous test pattern on the USB output that is useful for board-level tests. As seen in Figure 3 this test mode generates continuous J-K/J-K bit sequences to toggle the USB outputs generating a simple “Eye Pattern” commonly used to test signal integrity.

Diagram of Microchip DSPIC33EP256 MCU

Figure 3: Microchip DSPIC33EP256 MCU USB Test Mode. (Courtesy of Microchip)

USB in high-end MCUs

USB is not only found in low- and medium-end MCUs, it is a very useful interface for high-end devices as well. For example, the Texas Instruments F28M35H52C1RFPT is a dual-core MCU with very advanced processing capabilities and it includes a USB peripheral with On the Go capability. As seen in the block diagram of the F28M35H52C1RFPT (Figure 4), the USB peripheral, in the upper left of the diagram, is connected to the ARM Cortex-M3 CPU via an AHB bus accessed from an AHB bus matrix.

Block diagram of Texas Instruments F28M35x Concerto MCU (click for full-size)

Figure 4: Texas Instruments F28M35x Concerto MCU Block Diagram. (Courtesy of Texas Instruments)

The ARM Cortex-M3 CPU acts as the channel controller, responsible for managing all the communications ports. This is an important capability when USB is included on high-end devices so that USB traffic can be prioritized correctly with respect to all the other, competing, communications ports. For example, often the USB port is used for external file storage and data-transfer activity may need to be made a very high priority so that processing does not stall for lack of data.

Conclusion

There are many different approaches to USB implementations and it is important to understand some of the key features and differentiated functions offered by various MCU Families. It is much easier to find the right fit for your next USB application when you know some of the most common and important differences.









中文自动翻译,供参考

USB连接MCU的:哪个更适合你的下一个设计?

几乎所有的现代系列MCU具有USB外设。因为USB是一个标准的,则可能期望所有USB实现都是相同的。如果是的话,你会通过各种符合标准,而且还提供了额外的功能和特性,可能只是做一个特定的MCU适合您的下一个设计的实现惊讶。本文将介绍一些差异化的USB功能,你会发现,在流行的MCU系列。一旦你了解一些关键的不同,你可以更好地寻找,将提供完美的适合你的下一个设计的实现。

USB基础知识

同时在硬件和软件的水平 - 通用串行总线或USB,已由于其简单的物理层接口,它的灵活性,并且易于整合越来越流行。标准化和集成连接器可以很容易地接口的MCU的USB连接线,共同驱动程序和应用程序接口,或API,可以很容易地访问通过USB连接来传输和接收信息的数据包所需要的数据和控制元件。现成的参考设计,评估板和代码示例进一步简化基于MCU的实施。最近引入的在USB 3.1标准,具有高达10 Gbit / s的数据信号速率示出了标准的不断发展和可能是左右对许多,许多年。

 USB使用非对称拓扑结构,包括一台主机的在连​​接“金字塔”,用于管理整个网络的顶部。下游的USB端口(通常称为器件或功能)中的所有连接成直接主机或经由中间集线器,可以在星型拓扑扩展网络。主机可以有多个主机控制器,每个控制器管理多达127个端口。 USB通信使用的管道,或逻辑信道,即一个主控制器和一个设备的端点之间进行连接。 USB设备最多可以有32个端点(在16和16出)。有两种类型的管道:一个流,以用于数据传输,以及一个消息,用于短命令和状态转移。数据传输可以是同步(以保证数据速率),中断传输(当需要快速,低延迟的传输),或批量传输(通常用​​于文件传输,其中的延迟和数据传输速率并不重要)。

之一的USB标准的更多有用的方面是,有多个数据传输速率可能的(低速1.5 Mbit / s的,全速在12兆比特/秒,高速在480兆比特/秒,超5 Gbit / s的,和超高速+个10Gbit / s)和主机可以确定用于使用特殊枚举过程的每个设备的数据速率。这简化了连接管理和便于应用程序集中于刚传输数据,而不是管理建立低层的物理连接。

一些产品培训模块可从Digi-Key的讨论显著详细的USB标准(从FDTI和伍尔特电子,等等),如果读者希望深入挖掘。然而,这篇文章的目的,上述描述足以让我们来看看一些不同的特点和基于微控制器的USB外设功能,以更好地满足特定应用的要求,具有最佳的USB-实现功能设置。

USB实现

对于一些USB的基本知识的了解,我们就可以开始看看不同类型的MCU供应商在他们的设备所提供的实现。因为微控制器经常被发现控制USB外围设备,如传感器,指点设备和音频设备(仅举几例),而不是在主机控制器更经常在个人电脑和手持设备发现我们将通过观察一个示例函数实现启动在Spansion的FM3 MCU系列中,尤其是Spansion公司MB9AF3 MCU。

Spansion的MB9AF3 MCU采用了ARM的Cortex-M3的CPU,并拥有多种先进的外设,包括电机控制定时器,高速ADC,UART,SPI,I2C,DMA,和外部总线接口。一个USB外设同时具有一个主机和功能接口和功能的方框图显示在图1中。的CPU接口,在右侧的图,可以访问端点缓冲器,其中数据传输的位置。进出缓冲器是由经由UDC接口的USB数据控制器(UDC)管理。中断可用于通知的数据传输的状态的CPU和在CPU接口提供从CPU或DMA控制器访问缓冲器。

Spansion公司MB9AF3 MCU USB功能框图

图1:飞索MB9AF3 MCU USB功能框图。 (Spansion公司提供)

该飞索USB实现的关键要素是源USB时钟,端点,缓冲器的数量,和DMA访问到端点缓冲器。这些特征可以,因为它们不是由USB标准规定不同MCU供应商之间变化。例如,USB时钟由片上PLL可使用MCU的主时钟源,。这消除了对外部时钟减少了元件数量。并非所有的USB外设包括此功能。

从图1还可以看到有6个端点缓冲区。缓冲区的数量广泛使用不同的执行落实。对于简单的应用,少数缓冲器可能是足够的,但有可能是多个缓冲器的要求,这可能是因为有多个元件(例如,几个不同的传感器由MCU管理),或者因为多个缓冲区将简化软件实现由分离一个外设的不同的应用。

最后,USB实现之间的差异化的公共区域包括使用DMA的。常它是更有效的有来自CPU的独立管理,从而CPU可以操作的其它更复杂的任务,或可放在一个低功耗状态,直到有足够的数据可开始处理端点缓冲区。该MB9AF3 MCU提供了访问端点缓冲区的DMA控制器,还提供了一些中断,可用于更轻松地管理缓冲区传输。寻找这些功能时,电源效率是您的应用程序的关键。

端点控制

您需要端点的数量可以选择您的USB外设时,是一个关键的区别。的灵活性有与每个端点的量可以是在选择中的一个重要因素,也是。例如,赛普拉斯的PSoC CY8C24794有一个USB外设有五个端点和每个人都可以被单独分配响应中断,批量或同步IN或OUT请求。图2示出了各种可分配给每个端点任务。选择性这一级别避免了显著量的,否则将被需要的确定任务的类型,然后控制转移到所需的常规处理器开销。

表赛普拉斯的PSoC CY8C24794(点击查看全尺寸)

图2:赛普拉斯的PSoC CY8C24794 USB工作模式表。 (赛普拉斯提供)

Cypress的USB实现使用共享内存来存储端点数据,这可能会导致访问瓶颈,但使用的PSoC存储器仲裁(PMA)的优先处理器和USB外围设备之间的访问。这保证了移动指令由处理器连续流甚至在USB流量的最大速率处理将进行维修。

所述USB PMA具有足够的灵活性,使得端点数据不需要被处理接收到下一USB分组之前。这是通过简单地改变信道的写入位置或读位置寄存器值完成的。例如,当一个中断收到的资料表明,一个包已经收到,而不是处理数据,然后使终端接收更多的数据,你可以简单地改变写地址所使用的端点自由区的PMA通道的USB内存。通过这样做,你让USB SIE接收更多数据,而M8C正在处理先前接收的数据。类似的方法可用于制备数据到由IN事务的方式被发送。

当比较端点实现确保你不仅要看支持的端点的数量,而且在灵活性和软件支持USB外设提供量。这可以提高性能,降低功耗,并简化编码。

USB在旅途中

USB也发展到可以很容易地创建智能的USB设备,可以在任何一个主机或功能模式动态连接。这个“在转到”的能力使得有可能使用该设备作为外设(也许作为存储装置),然后作为宿主(或许以控制和功率的传感器,记录心脏速率活性)。这种能力是在各种的IoT应用中特别有用。 Microchip的DSPIC33EP256 MCU,例如,支持USB主机,设备和外出模式。在许多情况下,这样就可以看到什么低功耗的设施,可为USB外设是重要的低功率运行是在旅途中应用很重要。

Microchip的DSPIC33EP256 MCU使USB外围设备来操作,即使在一些低功耗模式。例如,当CPU被放置在空闲模式的周仍可操作。在空闲模式下,CPU的时钟被切断,并大大降低了这种动态功耗。 USB模块可以继续运行,当CPU处于空闲状态,一旦收到需要CPU干预的消息时,CPU可以带出空闲的。 USB外设和CPU都可以放在一个更低的功耗状态,睡眠,甚至更多的权力将被保存。该USB活动中断可用于从休眠模式唤醒器件,只要有USB总线上的总线活动。

您可能需要从您的USB外设的另一项功能是先进的测试功能。特别是,如果您使用的是USB首次一些你可能要具体包括板级测试功能的USB端口。 Microchip的DSPIC33EP256 MCU有一个特殊的USB测试模式,可以产生对USB输出即用于板级测试有用的连续测试码模式。正如图3此测试模式生成连续的JK / JK位序列来切换USB输出产生一个简单的“眼图”常用来测试信号的完整性。

Microchip的DSPIC33EP256单片机图

图3:Microchip的DSPIC33EP256 MCU USB测试模式。 (Microchip的提供)

USB高端微控制器

USB不仅在低收入和中端MCU的发现,它是高端设备的一个非常有用的接口也是如此。例如,德州仪器F28M35H52C1RFPT是一款双核MCU具有非常先进的处理能力,它包括一个USB外设与在转到能力。如图中F28M35H52C1RFPT(图4)的框图,USB外设,在图的左上方,经由从AHB总线矩阵访问的AHB总线连接到ARM Cortex-M3的CPU。

德州仪器的框图F28M35x协奏曲MCU(点击查看全尺寸)

图4:德州仪器F28M35x协奏曲MCU框图。 (德州仪器提供)

在ARM Cortex-M3 CPU充当通道控制器,负责管理所有的通信端口。这是当USB包含在高端设备,使得USB通信可以正确地对所有其他的,竞争的,通信端口进行优先排序的一个重要功能。例如,通常的USB端口用于外部文件存储和数据传输活动,可能需要提出了很高的优先级,以便处理不拖延数据缺乏。

结论

有许多不同的方法来实现USB和了解一些通过各种MCU系列提供的主要功能和差异化的功能是非常重要的。这是很容易找到合适的适合你的下一个USB应用,当你知道了一些最常见和最重要的差别。

 

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